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Central processing unit
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531	The following paper was originally published in the Proceedings of the 2nd USENIX Windows NT Symposium Seattle, Washington, August 3–4, 1998 The Sombrero Distributed Single Address Space Operating System Project Add to Reading List Source URL: static.usenix.org Language: English - Date: 1998-07-31 19:27:46 Windows NT Microsoft Windows Central processing unit Firmware PALcode Kernel Operating system Page Thread Computer architecture Computing System software
532	License Copyright © 2008 Ciaran McHale. Permission is hereby granted, free of charge, to any person obtaining a copy of this training course and associated documentation files (the “Training Course"), to deal in the T Add to Reading List Source URL: www.ciaranmchale.com Language: English - Date: 2008-05-17 08:17:25 Microprocessors Parallel computing Central processing unit Computer memory Scalability Multi-core processor CPU cache Lock Cache Computing Concurrent computing Threads
533	Efficient MRC Construction with SHARDS Carl A. Waldspurger, Nohhyun Park, Alexander Garthwaite, and Irfan Ahmad, CloudPhysics, Inc. https://www.usenix.org/conference/fast15/technical-sessions/presentation/waldspurger Th Add to Reading List Source URL: www.usenix.org Language: English - Date: 2015-05-05 03:57:23 Search algorithms Sampling CPU cache Central processing unit Computer memory Computer programming Hash table Lookup table Sample size determination Computing Statistics Cache
534	Prison Service Instruction Number Add to Reading List Source URL: webarchive.nationalarchives.gov.uk Language: English Systems engineering Technology Contract law E-procurement Electronic commerce Contract Central processing unit Purchasing Business Procurement Supply chain management
535	The standard input/output device for the LGP-21 is the Model 121 Tape Typewriter unit. It consists of an electric typewriter, a paper-tape reader, and a paper-tape punch. The reader and punch cannot be used separately fr Add to Reading List Source URL: www.ed-thelen.org Language: English - Date: 2008-07-23 04:19:34 Military computers Accumulator Central processing unit Punched tape Booting D-37C IBM 305 RAMAC Computer hardware Computing Classes of computers
536	THE LGP-27 COMMAND S7RUCTURE INTRODUCTION Generally stated, programming is the process by which problems are put into a form which a computer can handle. Since the computer can only calculate numerical answers to numeri Add to Reading List Source URL: www.ed-thelen.org Language: English - Date: 2008-07-23 04:19:34 Accumulator Central processing unit Models of computation Assembly languages Missile guidance Apollo Abort Guidance System NAR 1 Computing Computer hardware Computer architecture
537	Microsoft Word - vol1_Part 4_OS Scrub.doc Add to Reading List Source URL: files.renderingpipeline.com Language: English - Date: 2013-09-24 10:26:37 X86 instructions Central processing unit Control register MOV Instruction set architectures X86 architecture X86-64 Computer architecture Computing Programming idioms
538	The Energy/Frequency Convexity Rule: Modeling and Experimental Validation on Mobile Devices Karel De Vogeleer1 , Gerard Memmi1 , Pierre Jouvelot2 , and Fabien Coelho2 1 2 Add to Reading List Source URL: www.cri.ensmp.fr Language: English - Date: 2013-12-16 11:04:45 Computer hardware Clock signal Electric power Low-power electronics Dynamic voltage scaling Capacitor MOSFET Central processing unit AMD 10h Electronics Electronic engineering Energy conservation
539	ECE 554: Computer Architecture IN OUT Concepts: Add to Reading List Source URL: www.engr.colostate.edu Language: English - Date: 2009-01-05 17:37:43 Parallel computing Microprocessors Compiler optimizations Classes of computers Microarchitecture Instruction-level parallelism Central processing unit Multi-core processor Instruction scheduling Computing Computer architecture Concurrent computing
540	G45: Vol 4: Subsystems and Cores.doc Add to Reading List Source URL: files.renderingpipeline.com Language: English - Date: 2013-09-24 10:37:10 Central processing unit Instruction set architectures Assembly languages X86 architecture Instruction set SIMD Processor register Addressing mode CPU cache Computer architecture Computing Computer hardware

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